Cadence Design Systems
Cadence Design Systems is the world's leading EDA technologies and engineering services company.
- 408.943.1234
- 408.428.5001
- info@cadence.com
- 2655 Seely Avenue
San Jose, CA 95134
United States
-
product
Advanced Node Solution
A major new challenge at 20nm/14nm is the requirement for extra masks (double patterning technology, or DPT) to make existing lithography work at this advanced node. Read 20 questions on 20nm - a Q&A document.
-
product
LDE Electrical Analyzer
The Cadence LDE Electrical Analyzer helps designers identify, analyze, and minimize the effect of parametric issues associated with manufacturing variability to improve design performance.
-
product
Parallel Simulation Engine
RocketSim
Complementing compiled-code simulators, Cadence® RocketSim™ parallel simulation engine eliminates functional verification bottlenecks by speeding up simulation using commonly available multi-core servers.
-
product
Low-Power Solution
Power consumption affects the designer's ability to differentiate a product based on features, cost, performance, time to market, and even reliability. For mobile equipment, the explosion of applications leads to skyrocketing performance demands, in turn requiring innovative energy management.
-
product
Verification Suite
Cadence is committed to providing industry-leading bare metal compute, the fastest verification engines, and the smartest verification applications so you can find and fix the most bugs per dollar compute per day.
-
product
Pegasus Verification System
The Cadence® Pegasus® Verification System is a cloud-ready physical verification signoff solution, which enables engineers to deliver advanced-node integrated circuits (ICs) to market faster. The groundbreaking technology delivers up to 10X improved performance on DRC runs and reduces turnaround time from days to hours.
-
product
3D-IC Solution
Consumer demand for increased bandwidth and low power in smaller form factor has forced design teams to pursue design and manufacturing alternatives to single system-on-chip (SoC) approaches. Moving to advanced geometries like 20nm/14nm is a natural progression; however, it has its own cost, yield, manufacturing, and IP reuse challenges.
