![High Frequency Clock Divider Board](https://d27wgn5g4t3wja.cloudfront.net/img/fc942fc1-9a31-bdd9-3612-9bd5de8a57ad/244075.png)
High Frequency Clock Divider Board
Alliance Support Partners, Inc. (ASP)
Clock Divider is designed to divide high frequency signals, up to 2.5GHz, from 4 to 256 times. It will accept single ended (Unbalanced) or differential (Balanced) signals with amplitudes as little as 100mV rms. The clock division is controlled by 4 shunt jumpers. The circuit can be disabled and the divide by counter reset with 2 control signals. The on board regulator will accept voltages from 4.85 to 15.0V. The output is capable of driving 700mV Peak to Peak into 50 Ohms.