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Design Verification
Examination of design requirement fulfillment.
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IC Design & Verification
Mentor Graphics provides best-in-class products for IC design. Calibre for physical verification, extraction, resolution enhancement and mask data preparation, ADVance MS for analog/mixed-signal simulation and an integrated tool flow for custom IC design
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Static Design Verification
ALINT-PRO
ALINT-PRO™ is a design verification solution for RTL code written in VHDL, Verilog, and SystemVerilog, which is focused on verifying coding style and naming conventions, RTL and post-synthesis simulation mismatches, smooth and optimal synthesis, correct FSM descriptions, avoiding problems on further design stages, clocks and reset tree issues, CDC, RDC, DFT, and coding for portability and reuse. The solution performs static analysis based on RTL and SDC™ source files uncovering critical design issues early in the design cycle, which in turn reduces design signoff time dramatically. Running ALINT-PRO before the RTL simulation and logic synthesis phases prevents design issues spreading into the downstream stages of design flow and reduces the number of iterations required to finish the design.
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CPE Design Verification System
Jupiter 310
Jupiter is the industry standard for automated DOCSIS physical (PHY) layer testing. It provides the most comprehensive test coverage and accurate results on the market for DOCSIS 3.1 devices.
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Design Verification Editor Checker for SV/UVM
DVinsight
DVinsight-Pro is a Integrated Development Environment (IDE) for creation of Universal Verification Methodology (UVM) based System Verilog (SV) Design Verification (DV) code. Design & Verification Engineers can create correct by construction DV code because DVinsight-Pro is a design verification editor checker that provides helpful insight into user code and ensures compliance with UVM best practices while adhering to established standards.
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Functional Verification
The Mentor Graphics Scalable Verification" is the most comprehensive EDA solution for functional verification, merging standards support, tools and a "design for verification" methodology to minimize verification cycles and costly design respins.
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Verification IP's
SmartDV Technologies India Private Limited
We develop Verification Components, leveraging our rich experience in ASIC / SoC design verification and capabilities on high-level verification languages (HVLs). Our verification components are configurable, reusable plug-and-play verification solutions for standard interfaces based on HVL. We currently support SystemVerilog, Vera, SystemC, Specman E and Verilog. All our VIP''s are supported natively in SystemVerilog VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env.
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Carrier Board Design and Software Verification Computer-on-Module Starter Kit
Starter Kit - ETX
- ETX module of choice- CPU, Memory of choice- Thermal Solution (heatspreader, and heatsink) of choice- Reference Carrier Board- Schematics, Design Guide, and User Manuals- ADLINK USB Stick with Documentation, Software
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Envision Verification Analytics
Envision
IC Manage Envision Verification Analytics provides:* Anytime, anywhere, data-driven insights allow engineers and management to rapidly identify and address problem areas to meet tight schedules spanning simulation, formal and emulation tools.* Utilizes big data technology to deliver near real-time verification analytics across the verification tool spectrum, for any mix of EDA vendors* With 10-100X the speed of traditional methods you can instantly understand your verification progress, at local and global levels.* Visual analytics and interactive reporting for regressions, bugs and coverage* Verification results linked to relevant design activity to help identify and resolve bottlenecks
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Hybrid Verification Platform
HES-DVM
HES-DVM™ is a fully automated and scalable hybrid verification environment for SoC and ASIC designs. Utilizing the latest co-emulation standards like SCE-MI or TLM and newest FPGA technology, hardware and software design teams obtain early access to the hardware prototype of the design. Working concurrently with one another they develop and verify high-level code with RTL accuracy and speed-effective SoC emulation or prototyping models reducing test time and a risk of silicon re-spins.
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X-Design and Verification System
Ascent XV
The Ascent X-design and verification system (XV) prevents, detects and isolates issues caused by the propagation of unknowns (‘Xs’) in RTL designs, including Xs that occur during power-on initialization and switching between power modes. Early sign-off of X issues eliminates costly, painful gate-level debug, and prevents hidden functional bugs from slipping through to silicon.
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Engineering Design & Development
TPSA has over 20 years of experience in Engineering Design & Software Development including:Hardware & Software DesignOTPS Acquisition SupportSystems Installation & SupportAircraft Modification/CertificationEngineering Studies & AnalysesFunctional & Systems TestingIndependent Verification & Validation (IV & V)Test Program Set EngineeringReliability & Maintainability (R&M)Engineering Drawings & DataConfiguration Data ManagementReverse EngineeringRequirements AnalysisSupport Equipment (SE)Aircraft Launch & Recovery Engineering (ALRE)Engineering Change Proposal (ECP) ReviewTechnology Insertion (TI)PDR, CDR, FAT, Techeval, OSV Support
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Simulation and Model-Based Design
Simulink
Simulink is a block diagram environment for multidomain simulation and Model-Based Design. It supports system-level design, simulation, automatic code generation, and continuous test and verification of embedded systems. Simulink provides a graphical editor, customizable block libraries, and solvers for modeling and simulating dynamic systems. It is integrated with MATLAB, enabling you to incorporate MATLAB algorithms into models and export simulation results to MATLAB for further analysis.
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USB Protocol Verification System
Voyager M310e
The Voyager M310e is Teledyne LeCroy's flagship USB protocol verification system designed for USB 2.0, USB 3.2, Type-C, and USB Power Delivery. Offering the industry's highest fidelity probe design, flexible traffic generation, and a range of turnkey Compliance packages, the Voyager M310e is the most complete platform for cradle-to-grave USB design verification.
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Cloud-Ready Physical Verification Signoff Solution
Pegasus Verification System
The Cadence® Pegasus® Verification System is a cloud-ready physical verification signoff solution, which enables engineers to deliver advanced-node integrated circuits (ICs) to market faster. The groundbreaking technology delivers up to 10X improved performance on DRC runs and reduces turnaround time from days to hours. The Pegasus system’s innovative architecture and native cloud processing provides an elastic and flexible computing environment. Customers can now achieve complete full-chip signoff DRC on advanced-node designs in a matter of hours, helping designers deliver products to market faster, or easily run multiple DRC signoff iterations, if needed, at the time of tapeout. The Pegasus system provides a massively parallel architecture. It is the first solution to combine a pipelined infrastructure with stream processing delivering near-linear scalability across 100s of CPUs. The Pegasus system’s gigascale technology enables full-chip signoff DRC in just a few hours versus days. As many designs continue to grow in complexity, the Pegasus system can scale to meet customers’ stringent time-to-market requirements.
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Analog Custom IC Design Solution
Silvaco offer a full IC-CAD design flow including design capture, circuit simulation, layout design, physical verification, parasitic extraction and reduction, and post-layout analysis including statistical variation, IR-drop/EM.
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PCB Simulation Solutions for High-Performance Designs
HyperLynx
HyperLynx® offers a complete suite of analysis and verification software that meets the needs of PCB engineers at any point in the board design flow. Easy to use and integrate into your flow, HyperLynx equips PCB engineers to efficiently analyze, solve and verify critical requirements to avoid costly re-spins. Achieve greater innovation, faster time-to-market and decreased costs with HyperLynx.
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Portable Sequence Generator for Verification, Firmware & Validation
ISequenceSpec
The complexity of modern SoC has raised the requirement for HW/SW co-simulation to catch the bugs from the early design stage. There is lack of common set of sequences which can be shared across the teams. ISepenceSpec helps design teams to generate the unified test and programming sequences in UVM and Firmware from the specification. ISequenceSpec uses the register information from importing the standard formats like IP-XACT, SystemRDL, XML. User can define the test sequences in a simple editor, and then generate the unified test sequences from verification to validation.
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Automotive RF Design Verfication Test System
The system is used for design verification of RF assemblies. By using similar measurement technology and test software as in the production testers, parts of the test procedures developed in development can be reused in production. The DUTs are tested in RF-tight shield boxes and contacted via original plugs. The shield boxes are connected via N-connectors and other typical laboratory contacts. This allows test setups to be easily modified and individual signal paths to be separated.
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Circuit Simulation, Power Analysis and Jitter Analysis Design Tools
GreenPoint®
The GreenPoint Design Simulation Tool is an interactive online design and verification tool to help you generate and validate an electronic design. The simulation module provides an interactive design and verification environment. The power analysis module provides an interactive environment to analyze the performance of intelligent power modules (IPMs). The Phase Noise Explorer module enables an interactive environment for advanced phase noise/jitter analysis of clock tree designs.
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Multimode Intent Driven Clock Domain Crossing Sign-off of SoC Designs
Verix CDC
Verix product family initially offers Verix CDC, which provides one-step analysis and debug of all operating modes in an IC, and boosts productivity for SoC and FPGA design teams. Verix CDC, with its proprietary static intent verification technology, is the most precise and lowest-noise solution in the industry for multimode CDC analysis.
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360 EC-ASIC
ASIC synthesis verification from RTL code to final netlist.Systematic design errors, introduced by automated design refinement tools, such as ASIC synthesis, can be hard to detect, and damaging if they make it into the final device. Formal Equivalency Checking (EC) has become a standard part of the ASIC development flow, replacing almost all gate level simulation with a rigorous consistency check between pre- and post-synthesized code.
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3U VPX Development Kit
This development kit enables efficient 3U VPX backplane design and software verification.- 3U VPX architecture- One CPU blade, one GPU blade (optional), SOSA-aligned- 1TB NVMe pre-installed in CPU blade- Rear transition module(s) included- Test Frame with backplane pre-installed
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AC Power Source
6500 series
The global AC power testing requirements demand more sophisticated AC Power Source that is capable of simulating a wide variety of AC line conditions, harmonic waveforms, accurate power measurement and analysis. The Chroma 6500 series Programmable AC Power Source delivers the right solution to simulate all kinds of normal/abnormal input conditions and measure the critical characteristics of the product under test. It can be used for R&D design characterization, production testing, and QA verification of commercial, industrial, and aerospace electronic products. The Chroma 6500 series delivers maximum rated power for any output voltage up to 300 Vac, and at any frequency between 15Hz to 2000Hz. It is suitable for commercial applications (47-63Hz); for avionics,marine, military applications at 400Hz or higher frequency; or for electrical motor, air-conditioner test applications at 20Hz. All models generate very clean sine or square waveforms output with typical distortion less than 0.5%. The Chroma 6500 series has built-in Direct Digital Synthesis (DDS) Waveform Generator to provide user programmable high precision waveform. For testing products under AC line distortion conditions, clipped sinewave can be generated with 0% to 43% distortion and amplitude from 0% to 100%. It also can simulate all kinds of power line disturbances such as cycle dropout, transient spike, brown out, phase angle, voltage and frequency ramp up (ramp down), etc.. Up to 30 harmonic waveforms are factory installed, and testing for compliance to AC line harmonic immunity standards can be easily achieved in the field.
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AC Source
AFV-P
Intepro’s AFV-P Series is a programmable AC/DC output power source with precision measurement and control. This compact power source comes in four power levels, 600VA, 1250VA, 2500VA and 5000VA, providing clean power with distortion less than 0.3% at 40-100Hz. The AFV-P series delivers output voltage from 0 to 310VAC and frequency from 40 to 500Hz or 15 to 1000Hz with the high frequency option. It is ideal for commercial, defense and aerospace test applications from design verification, quality assurance, ATEs. The AFV-P Graphical Users Interface software makes it easy to setup complex testing of the AC input to the UUT.
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Active FET Probe Kit 1.2 GHz, 10x, ±40 V
CT4121
The CT4121 is a compact FET probe with very high input resistance and low input capacitance. With a 1.2 GHz bandwidth, this probe is ideal for timing analysis or troubleshooting high speed logic circuits, for design verification of disk drives, as well as for wireless and data communication design. The CT4121 can measure up to ±40 V (DC + AC peak). Compatible with oscilloscopes from all major manufacturers, the probe is powered by the included 9 V battery or direct from the oscilloscope using the included USB power lead.
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Adapters
BroadWave designs and manufactures Coaxial Adapters and other coaxial RF components that are ideally suited for test, verification and system integration. Our products offer consistent performance at a low cost with an emphasis on performance and configuration flexibility.
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Aerospace Onboard Software Modules
ADS2 for Aerospace
Your product description goes here. The Aerospace Onboard System Development Process is guided by SAE ARP4754A. It consists of multiple levels of specification, design, validation and verification and is distributed between OEM and multiple suppliers of systems, subsystems and components.Due to the complexity of the development process, a consistent platform supporting model based validation, virtual and physical integration as well as requirement based verification at each level is of great importance for the industry.
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Aerospace System Development
For more than ten years, TechSAT provides to its customers research and development services for safety critical systems, primarily in electron-mechanical and avionics domains. At System Level we offer ARP4754A and ARP4761 compliant development including System Specification, Safety Assessment, System Architecture Design, Model based Validation, System Integration and Verification as well as certification support for Part 23 and Part 25 programs.At Equipment Level TechSAT offers customer specific LRU development including all elements of the development life cycle from conceptual design, through formal requirement based engineering, hardware and software development compliant to DO254, DO178, verification and validation including DO160 environmental qualification up to a DAL A certifiable product.
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Automated Test Equipment
Viewpoint Systems offers design verification and manufacturing quality inspection systems to help customers reduce human error in repetitive tests, increase testing speeds, and ultimately get products to market faster at a lower cost. Viewpoint Transforms Test from Design to End-of-Line. Our R&D test systems are designed with the flexibility to validate ever-changing prototypes while accelerating your development schedule.
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Bench & Characterization Boards
Engineer, Design, Fabricate & Assemble Custom Boards for:*Device Characterization and Verification*Bench Testing*Failure Analysis*General Laboratory Use
